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DesignCon 2026: The Future of AI Data Centers

DesignCon where the chip meets the board

From 448G lanes to liquid-cooled racks, Silicon Valley’s signal- and power-integrity show is turning into an AI infrastructure lab.

By: Patrick Mannion, Contributing Editor

DesignCon 2026 (February 24–26, Santa Clara, CA) has turned its renowned signal- and power-integrity specialty into a front-row view of how trillions of dollars of AI data centers will be designed, connected, powered, cooled, and tested. With more than 200 exhibitors and a conference program spanning quantum entanglement and agentic AI chip design to high-speed interconnects, advanced packaging, power delivery, and thermal design, the event offers a dense preview of the physical layer, tool, and test technologies that will underpin the next wave of GPU clusters and AI fabrics.

Quantum networking, agentic AI, and NASA’s goals

The keynotes set the vision and strategic context for data-center builders. In Tuesday’s “From Spooky Action at a Distance to the Quantum Internet,” Purdue University’s Joseph Lukens (Figure 1) will dive into entanglement and emerge with his vision of a quantum superhighway that will revolutionize how we measure, transmit, and process information.

Figure 1: Keynotes by Purdue’s Joseph Lukens (left), Agentrys’ Mark Ren (center), and NASA’s Bhanu Sood will range from quantum networking to agentic AI chip design to innovations needed for planetary travel. (Images compiled from DesignCon.com source material)

On Wednesday, Agentrys founder Mark Ren’s “Agentic AI for Chip Design” keynote will describe the tooling behind next-generation accelerators and networking silicon. The presentation will trace the evolution of agentic AI from simple agents that autonomously repair RTL syntax errors to multi-agent systems capable of generating full RTL designs directly from specifications. Ren will highlight applications across generation, optimization, debugging, and analysis, while uncovering challenges and opportunities.

NASA will take the podium on Thursday. In “Designing for Discovery: Technology Innovations Driving NASA’s Science and Exploration Goals,” Bhanu Sood, Chief Technologist at NASA Goddard Space Flight Center, will explore the innovations critical for sustainable planetary travel, including autonomous navigation, high-performance onboard computing, and miniaturized sensing. Sood’s digging into AI-enabled electronics, modular architectures, and photonic systems underscores the need for reliability and resilience that data-center operators will recognize from their own environments.

Expo floor: 200+ vendors building the AI stack

The exhibitor list for this year’s DesignCon 2026 runs to 202 companies and reads like a who’s who of high-speed hardware: connector giants, test-and-measurement leaders, EDA vendors, PCB and materials suppliers, and major distributors. Many will land with product and technology demonstrations and announcements tailored for the event.

The criticality of chip-to-chip and chassis-to-chassis signal integrity and efficiency at the data rates required by current and emerging data center workloads cannot be overstated, especially at DesignCon. To this end, connectivity solutions loom large.

Samtec (Booth 939), for example, will demonstrate how it is solving for 224 and 448 Gbps data rates, and signaling up to 130 GHz. Its focus will be on its CPX co-packaged copper (CPC) and co-packaged optics (COP) solutions, including active demonstrations of its Si-Fly® HD CPC connectors operating at 224 Gbps (Figure 2). It will also demo a new Si-Fly backplane system, also running at 224 Gbps.

Figure 2: Samtec will demonstrate its Si-Fly HD CPC connector operating at 225 Gbps at DesignCon. (Image source: Samtec)

Other Samtec booth demos include 112 Gbps active optics that incorporate its FireFlyTM and new HaloTM products; its distinctive orange NitrowaveTM RF cable, part of the new Bulls Eye BE71A test assembly for 224 Gbps PAM4 SERDES; and the new Bulls Eye BE130 test assembly running 448 Gbps differential signals for test channels. Samtec will also showcase advancements in material science with SureCoat ultra-rugged coatings for high temperatures and harsh environments.

Joining Samtec in the co-packaged copper race is Molex (Booth 739), which just announced its Impress Co-Packaged Copper Solutions explicitly timed for DesignCon 2026. This platform scales near-ASIC connectivity for the ultra-short-reach, high-density links that will dominate AI fabrics. It is designed to reduce latency and power compared to longer copper or optical runs. Building on Molex’s NearStack On-the-Substrate (OTS) Connectors, which moved high-speed paths off the board, Impress places the connection point directly on the ASIC package substrate. Molex will demo Impress alongside other 224 Gbps developments and next-generation RF/microwave test solutions, with additional technical sessions throughout the conference.

Amphenol Communications Solutions (Booth 833), as host sponsor, is previewing a broader high-speed connectivity portfolio that complements these lane-speed breakthroughs. Their DesignCon presence centers on next-generation socket technology for processors and accelerators, innovative cable assemblies and backplanes for very high data rates, and liquid-cooling solutions integrated with dense interconnects, all framed around the processing demands of AI-driven computing and cloud storage.

These announcements from Samtec, Molex, and Amphenol collectively paint a clear picture: the AI data center’s physical layer is shifting from standalone pluggables toward tightly integrated, co-packaged copper and optics that live right next to the ASICs, with liquid cooling becoming table stakes for density.

TE Connectivity (Booth 639) extends this narrative into full rack architectures with its “Engineering the Future of AI” platform, featuring 448 G/lane co-packaged copper, 200G OTB AdrenaLINE Catapult UHD connector, active copper cables with redrivers, ultra-low-profile PCIe Gen 7 connectors, 1.6T optics, and rack-level LVDC/HVDC power plus liquid-cooling solutions purpose-built for hyperscale, AI/ML, and HPC workloads.

Semtech (MR655) rounds out the interconnect story with 400G, 800G, and 1.6T data-center links optimized for GPU cluster scaling, emphasizing power-efficient signal integrity at multi-terabit speeds.

Oddly, the roster is missing optical connectivity solution providers and innovators such as Lumentum and POET Technologies. Data Centre Digest may have to wait until OFC to talk with them.

Power delivery and thermal management: the other half of AI density

High-speed signaling grabs headlines, but AI data centers live or die by power and cooling. DesignCon exhibitors are addressing these challenges head-on.

For example, TE Connectivity’s rack-level LVDC/HVDC power distribution systems comprise busbar and cable solutions that deliver the massive current densities required by dense GPU racks while minimizing resistive losses. Paired with liquid-cooling-ready interconnect architectures, TE is showing how power and signaling can coexist at extreme densities.

Amphenol complements this with liquid-cooling-integrated high-speed interconnects. Their socket, cable, and backplane portfolio incorporates thermal pathways that enable direct-to-chip cooling, critical as AI racks push 100 kW+ per cabinet.

For power delivery, TDK Lambda (Booth 418) and other DC-DC specialists will demo the point-of-load conversion and fast-transient response needed for next-gen AI servers.

Test: Where physical AI hits reality

Vendors may be pushing 224 and 448G lane speeds, co-packaged copper, and liquid-cooled power racks, but Keysight Technologies (Booth 1039) and Rohde & Schwarz (Booth 949) are defining how those designs get validated for production data centers.

Keysight’s DesignCon focus spans PCIe® Gen 7 and USB4 compliance, next-gen Ethernet and memory debug, signal integrity at 3.2T (pairing the PLTS2026 test system with the NA53071 frequency extender), AI fabric interoperability testing at 400G to 1.6T, and chiplet interconnect characterization, essentially the full lab workflow for bringing AI infrastructure online.

Rohde & Schwarz pairs cutting-edge oscilloscopes and VNAs with workshops on S-parameter analysis, power-integrity probing, ML-assisted PDN design, and IEEE 802.3dj (200 Gb/s per lane) compliance, tackling real-world measurement challenges posed by fast load transients and mmWave PCB validation. It will also offer attendees a chance to win the new MXO 3 oscilloscope (Figure 3).

Figure 3: Along with demos and workshops, Rohde & Schwarz will offer attendees a chance to win the new MXO 3 oscilloscope. (Image source: Rohde & Schwarz)

While Samtec, Molex, Amphenol, and TE prototype tomorrow’s AI fabrics, Keysight and Rohde & Schwarz are writing the test playbook that determines which designs survive contact with reality.

To support applications for the data center and beyond, Mouser (Booth 1139) will showcase the latest semiconductors and technologies from its 1,200 manufacturers, including many of the suppliers mentioned here. Others on display include Analog Devices, Inc., Hirose, Microchip Technology, NXP, Omron, Renesas, and STMicroelectronics. Mouser engineers will be on hand to advise on component selection and on how to get projects off the ground, using its hands-on and online resources.

Anyone still considering attending DesignCon 2026 can register with the Samtec VIP code: INVITE373903 to receive a free Expo Pass or 15% discount for conference passes.

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